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general description the MAX17075 includes a high-voltage boost regulator, one high-current operational amplifier, two regulated charge pumps, and one mlg block for gate-driver supply modulation. the step-up dc-dc converter is a 1.2mhz current- mode boost regulator with a built-in power mosfet. it provides fast load-transient response to pulsed loads while producing efficiencies over 85%. the built-in 160m (typ) power mosfet allows output voltages as high as 18v boosted from inputs ranging from 2.5v to 5.5v. a built-in 7-bit digital soft-start function controls startup inrush currents. the gate-on and gate-off charge pumps provide regu- lated tft gate-on and gate-off supplies. both output voltages can be adjusted with external resistive voltage-dividers. the operational amplifier, typically used to drive the lcd backplane (vcom), features high-output short-cir- cuit current (?00ma), fast slew-rate (45v/?), wide bandwidth (20mhz), and rail-to-rail outputs. the MAX17075 is available in a 24-pin thin qfn pack- age with 0.5mm lead spacing. the package is a square (4mm x 4mm) with a maximum thickness of 0.8mm for ultra-thin lcd design. it operates over the -40? to +85? temperature range. applications notebook computer displays lcd monitor panels lcd tvs features 2.5v to 5.5v input operating range current mode step-up regulator fast-transient response built-in 20v, 3a, 0.16 n-channel power mosfet cycle-by-cycle current limit 87% efficiency (5v input to 13v output) 1.2mhz switching frequency ?% output voltage regulation accuracy high-current 18v vcom buffer ?00ma output short-circuit current 45v/? slew rate 20mhz -3db bandwidth rail-to-rail output regulated charge pump for tft gate-on supply regulated charge pump for tft gate-off supply logic-controlled high-voltage switches with adjustable delay soft-start and timed delay fault latch for all outputs overload and thermal protection MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp ________________________________________________________________ maxim integrated products 1 ordering information MAX17075 agnd vcc bgnd drvn ref fbn pos neg out lx pgnd rstin fb comp drn rst com src drvp fbp sup ctl ep del r1 10 c5 1f v avdd to v com bgnd v in 2.5v to 5.5v v gon v goff from system 3.3v v in v main from tcon simplified operating circuit 19-4353; rev 0; 11/08 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available part temp range pin-package MAX17075etg+ -40 c to +85 c 24 tqfn-ep* * ep = exposed paddle. + denotes a lead-free/rohs-compliant package. pin configuration appears at end of data sheet.
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v vcc = +5v, circuit of figure 1, v avdd = v sup = +13v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. vcc, ctl, rstin, rst to agnd ..........................-0.3v to +7.5v del, ref, comp, fb, fbn, fbp to agnd .......................................-0.3v to (v vcc + 0.3v) pgnd, bgnd to agnd.........................................-0.3v to +0.3v lx to pgnd ............................................................-0.3v to +20v sup to pgnd .........................................................-0.3v to +20v drvn, drvp to pgnd..............................-0.3v to (v sup + 0.3v) src, com, drn to agnd .....................................-0.3v to +36v drn to com............................................................-30v to +30v src to sup ............................................................................23v ref short circuit to agnd.........................................continuous pos, neg, out to agnd...........................-0.3v to (v sup + 0.3) drvn, drvp rms current ...............................................200ma lx, pgnd rms current rating.............................................2.4a continuous power dissipation (t a = +70 c) 24-pin tqfn (derate 27.8mw/? above +70?).......2222mw operating temperature range ...........................-40 c to +85 c junction temperature ......................................................+150 c storage temperature range .............................-65 c to +160 c lead temperature (soldering, 10s) .................................+300 c parameter conditions min typ max units v cc input supply range 2.5 5.5 v v cc undervoltage-lockout (uvlo) threshold v cc rising, hysteresis (typ) = 50mv 2.05 2.25 2.45 v v cc shutdown current v cc = 2v 100 200 a v fb = 1.3v, not switching 1 1.5 v cc quiescent current v fb = 1.0v, switching 4 5 ma reference ref output voltage no external load 1.238 1.250 1.262 v ref load regulation 0n < i load < 50a 6 mv ref sink current in regulation 10 a ref undervoltage-lockout threshold rising edge, hysteresis (typ) = 200mv 1 1.17 v oscillator and timing frequency 1000 1200 1400 khz oscillator maximum duty cycle 87 90 93 % duration to trigger fault condition fb or fbp or fbn below threshold 47 55 65 ms del capacitor charge current during startup, v del = 1.0v 4 5 6 a del turn-on threshold 1.19 1.25 1.31 v del discharge switch on-resistance 20 step-up regulator output voltage range v vcc 18 v fb regulation voltage fb = comp, c comp = 1nf 1.238 1.250 1.262 v fb fault trip level falling edge 0.96 1 1.04 v fb load regulation 0 < i load < full, transient only -1 % fb line regulation v cc = 2.5v to 5.5v -0.2 0 +0.2 %/v fb input bias current v fb = 1.25v 50 125 200 na fb transconductance i = 2.5a at comp, fb = comp 75 160 280 s fb voltage gain fb to comp 2600 v/v
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp _______________________________________________________________________________________ 3 parameter conditions min typ max units lx current limit v fb = 1.1v, duty cycle = 75% 2.5 3.0 3.5 a lx on-resistance i lx = 200ma 0.16 0.25 lx leakage current v lx = 19v, t a = +25c 10 20 a current-sense transresistance 0.1 0.2 0.3 v/a soft-start period 7-bit current ramp 14 ms positive charge-pump regulator v sup input supply range 6 18 v v sup overvoltage threshold v sup = rising, hysteresis = 200mv 19 20 21 v operating frequency 0.5 x f osc hz fbp regulation voltage -1.5% 1.250 +1.5% v fbp line regulation error v sup = 12v to 18v, v gon = 30v 0.2 %/v fbp input bias current v fbp = 1.5v, t a = +25c -50 +50 na drvp current limit not in dropout 400 ma drvp pch on-resistance 4 6 drvp nch on-resist ance 1.5 3 fbp fault trip level falling edge 0.96 1 1.04 v positive charge-pump soft-start period 7-bit voltage ramp with filtering to prevent high peak currents 3 5 ms negative charge-pump regulator v sup input supply range 6 18 v operating frequency 0.5 x f osc hz fbn regulation voltage (v ref - v fbn ) v ref - v fbn = 1v -1.5% 1 +1.5% v fbn input bias current v fbn = 0, t a = +25c -50 +50 na fbn line regulation error v sup = 9v to 18v, v goff = -7v 0.2 %/v drvn pch on-resistance 4 6 drvn nch on-resistance 1.5 3 drvn current limit not in dropout 400 ma fbn fault trip level rising edge 450 mv negative charge-pump soft-start period 7-bit voltage ramp with filtering to prevent high peak currents 3 5 ms positive gate driver timing and control switches ctl input low voltage 0.6 v ctl input high voltage 2 v ctl input current v ctl = 0 or v vcc , t a = +25c -1 +1 a ctl-to-com rising propagation delay c load = 100pf 250 ns src input voltage range 36 v src-to-com switch on-resistance v del = 1.5v, ctl = vcc 5 10 electrical characteristics (continued) (v vcc = +5v, circuit of figure 1, v avdd = v sup = +13v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.)
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp 4 _______________________________________________________________________________________ electrical characteristics (continued) (v vcc = +5v, circuit of figure 1, v avdd = v sup = +13v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) parameter conditions min typ max units drn-to-com switch on-resistance v del = 1.5v, ctl = agnd 30 60 com-to-gnd pulldown v del = 0 1.5 2.5 k v del = 1.5v, ctl = vcc 300 600 src input current v del = 1.5v, ctl = agnd 200 360 a operational amplifiers sup supply range 6 18 v vsup undervoltage threshold 3.8 4 4.2 v sup supply current buffer configuration, v pos = v sup /2, no load 4 6.5 ma input offset voltage v neg , v pos = v sup /2, t a = +25 c 12 mv input bias current v neg , v pos = v sup /2, t a = +25 c -1 +1 a input common-mode voltage range 0 v sup v input common-mode rejection ratio 80 db output-voltage-swing high i out = 50ma v sup - 350 mv output-voltage-swing low i out = -50ma 350 mv large-signal voltage gain v out = 1v to (v sup - 1)v 80 db slew rate 45 v/s -3db bandwidth 20 mhz sourcing 500 short-circuit current sinking 500 ma xao control falling edge at v cc = 5v 1.225 1.250 1.275 rstin threshold falling edge at v cc = 1.8v 1.213 1.250 1.287 v rstin input current t a = +25 c -1 +1 a rstin hysteresis 50 mv rst output voltage i sink = 1ma 0.4 v rst blanking time counting from v vcc crossing 2.25v 160 220 280 ms xao uvlo v vcc rising with hysteresis of 50mv 1.5 1.7 v
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp _______________________________________________________________________________________ 5 electrical characteristics (v cc = +5v, circuit of figure 1, v avdd = v sup = +13v, t a = -40? to +85? , unless otherwise noted.) (note 1) parameter conditions min typ max units v cc input supply range 2.5 5.5 v v cc undervoltage-lockout threshold v cc rising, hysteresis (typ) = 50mv 2.05 2.45 v v cc shutdown current 200 a v fb = 1.3v, not switching 1.5 v cc quiescent current v fb = 1.0v, switching 5 ma reference ref output voltage no external load 1.230 1.267 v ref load regulation 0 < i load < 50a 6 mv ref sink current in regulation 10 a ref undervoltage-lockout threshold rising edge, hysteresis (typ) = 200mv 1.15 v oscillator and timing frequency 1000 1400 khz oscillator maximum duty cycle 86 94 % duration to trigger fault condition fb or fbp or fbn below threshold 47 65 ms del capacitor charge current during startup, v del = 1.0v 4 6 a del turn-on threshold 1.19 1.31 v step-up regulator output voltage range v in 18 v fb regulation voltage fb = comp, c comp = 1nf 1.230 1.267 v fb fault trip level falling edge 0.96 1.04 v fb line regulation v cc = 2.5v to 5.5v -0.25 +0.25 %/v fb input bias current v fb = 1.25v 50 200 na fb transconductance i = 2.5a at comp, fb = comp 75 280 s lx current limit v fb = 1.1v, duty cycle = 75% 2.5 3.5 a lx on-resistance i lx = 200ma 0.25 current-sense transresistance 0.10 0.30 v/a positive charge-pump regulator v sup input supply range 6 18 v v sup overvoltage threshold v sup = rising, hysteresis = 200mv 19 21 v fbp regulation voltage -2% 1.25 +2% v fbp line regulation error v sup = 8v to 18v, v gon = 30v 0.2 %/v fbp input bias current v fbp = 1.5v, t a = +25 c -50 +50 na drvp pch on-resistance 6 drvp nch on-resist ance 3 fbp fault trip level falling edge 0.96 1.04 v positive charge-pump soft-start period 7-bit voltage ramp with filtering to prevent high peak currents 5 ms
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp 6 _______________________________________________________________________________________ electrical characteristics (continued) (v cc = +5v, circuit of figure 1, v avdd = v sup = +13v, t a = -40? to +85? , unless otherwise noted.) (note 1) parameter conditions min typ max units negative charge-pump regulator v sup input supply range 6 18 v fbn regulation voltage (v ref - v fbn ) v ref - v fbn = 1v -2% 1 +2% v fbn input bias current v fbn = 0, t a = +25 c -50 +50 na fbn line regulation error v sup = 9v to 18v, v goff = -7v 0.2 %/v drvn pch on-resistance 6 drvn nch on-resistance 3 negative charge-pump soft-start period 7-bit voltage ramp with filtering to prevent high peak currents 5 ms positive gate-driver timing and control switches ctl input low voltage 0.6 v ctl input high voltage 2 v ctl input current v ctl = 0 or v vcc , t a = +25 c -1 +1 a src input voltage range 36 v src-to-com switch on-resistance v del = 1.5v, ctl = vcc 10 drn-to-com switch on-resistance v del = 1.5v, ctl = agnd 60 com-to-gnd pulldown v del = 0 1.5 2.5 k v del = 1.5v, ctl = vcc 600 a src input current v del = 1.5v, ctl = agnd 360 a operational amplifiers sup supply range 6 18 v v sup undervoltage threshold 3.8 4 4.2 v sup supply current buffer configuration, v pos = v sup /2, no load 6.5 ma input offset voltage v neg , v pos = v sup /2, t a = +25 c 8 mv input bias current v neg , v pos = v sup /2, t a = +25 c -1 +1 a input common-mode voltage range 0 v sup v output-voltage-swing high i out = 50ma v sup - 350 mv output-voltage-swing low i out = -50ma 350 mv sourcing 500 short-circuit current sinking 500 ma xao control rstin threshold falling edge 1.22 1.28 v rstin input current t a = +25 c -1 +1 a rst output voltage i sink = 1ma 0.4 v rst blanking time counting from v vcc crossing 2.25v 160 280 ms xao uvlo v cc rising with typical hysteresis of 50mv 1.7 v note 1: -40 c specifcations are guaranteed by design, not production tested.
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp _______________________________________________________________________________________ 7 step-up regulator efficiency vs. load current MAX17075 toc01 load current (ma) efficiency (%) 100 10 10 20 30 40 50 60 70 80 90 100 0 1 1000 v in = 5v v in = 3.3v v in = 2.5v step-up regulator output voltage vs. load current MAX17075 toc02 load current (ma) output error (%) 700 800 900 100 200 300 400 500 600 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 -1.0 0 1000 step-up regulator line regulation under different loads MAX17075 toc03 input voltage (v) output error (%) 4.5 3.0 3.5 4.0 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 -0.20 2.5 5.0 300ma load 100ma load 200ma load no load step-up regulator switching frequency vs. input voltage MAX17075 toc04 input voltage (v) switching frequency (mhz) 4.5 3.0 3.5 4.0 1.17 1.18 1.19 1.20 1.21 1.22 1.23 1.24 1.16 2.5 5.0 150ma load step-up regulator startup with heavy load (600ma) MAX17075 toc05 2ms/div 0v v in 5v/div v avdd 5v/div lx 10v/div i l 1a/div 0v 0a 0v step-up regulator load-transient response (100ma to 800ma) MAX17075 toc06 40 s/div r comp = 82k c comp1 = 220pf c comp2 = 18pf 0v v avdd (ac-coupled) 500mv/div load current 500ma/div i l 2a/div 0a 0a MAX17075 toc07 step-up regulator pulsed load-transient response (80ma to 2.08ma) 10 s/div r comp = 82k c comp1 = 220pf c comp2 = 18pf 0v v avdd (ac-coupled) 500mv/div load current 1a/div i l 2a/div 0a 0a typical operating characteristics (t a = +25?, unless otherwise noted.) typical operating characteristics (t a = +25?, unless otherwise noted.)
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp 8 _______________________________________________________________________________________ in supply quiescent current vs. in supply voltage MAX17075 toc08 supply voltage (v) supply current (ma) 4.5 3.0 3.5 4.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2.5 5.0 200ma load no switching MAX17075 toc09 power-up sequence of all supply outputs 4ms/div v in : 5v/div ref : 1v/div avdd : 10v/div vcom : 5v/div src : 20v/div goff : 5v/div gon : 20v/div del : 2v/div 0v 0v 0v 0v 0v 0v v in avdd vcom src ref del goff gon positive charge-pump regulator line regulation MAX17075 toc10 supply voltage (v) output error (%) 15 16 17 12 13 14 -0.25 -0.20 -0.15 -0.10 -0.05 0 0.05 -0.30 11 18 positive charge-pump regulator load regulation MAX17075 toc11 load current (ma) output error (%) 40 50 70 60 10 20 30 -1.6 -1.2 -0.8 -0.4 0 0.4 -2.0 080 vsrc gon MAX17075 toc12 positive charge-pump regulator load-transient response (10ma to 100ma) 4 s/div 0v 0a gon (ac-coupled) 200mv/div load current 50ma/div negative charge-pump regulator line regulation MAX17075 toc13 supply voltage (v) output error (%) 14.5 11.5 12.5 13.5 0 0.2 -0.2 10.5 17.5 15.5 16.5 negative charge-pump regulator load regulation MAX17075 toc14 load current (ma) output error (%) 60 20 40 0 0.2 -0.2 0 120 80 100 negative charge-pump regulator load-transient response (10ma to 100ma) MAX17075 toc15 4 s/div 0v goff (ac-coupled) 100mv/div load current 50ma/div 0a typical operating characteristics (continued) (t a = +25?, unless otherwise noted.)
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp _______________________________________________________________________________________ 9 operation amplifier frequency response MAX17075 toc16 frequency (khz) gain (db) 1k 10k -6 -5 -4 -3 -1 -2 0 1 2 -8 -7 100 100k 100pf load no load operational amplifier rail-to-rail input/ouput waveforms MAX17075 toc17 2 s/div 0v v pos 5v/div v vcom 5v/div 0v operational amplifier load-transient response MAX17075 toc18 2 s/div 0v v vcom (ac-coupled) 200mv/div i vcom 50mv/div 0a operational amplifier large-signal step response MAX17075 toc19 40 s/div 0v 0v v pos 5v/div v vcom 5v/div operational amplifier small-signal step response MAX17075 toc20 40 s/div 0mv 0mv v pos (ac-coupled) 100mv/div v vcom (ac-coupled) 100mv/div sup supply current vs. sup supply voltage MAX17075 toc22 supply voltage (v) supply current (ma) 14 16 81012 3.55 3.65 3.60 3.70 3.75 3.80 3.90 3.85 3.95 4.00 3.50 618 no switching high-voltage switch control function MAX17075 toc21 10 s/div 0v 0v v gon 10v/div v ctl 5v/div typical operating characteristics (continued) (t a = +25?, unless otherwise noted.)
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp 10 ______________________________________________________________________________________ pin description pin name function 1 pos operational amplifier noninverting input 2 neg operational amplifier inverting input 3 out operational amplifier output 4 bgnd analog ground for operati onal amplifier and charge pump. connect to agnd under neath the ic. 5 sup operational amplifier and charge-pump supply input. connect this pin to the output of the boost regulator (avdd) and bypass to bgnd with a minimum1f capacitor. 6 drvp positive charge-pump driver output 7 drvn negative charge-pump driver output 8 ctl high-voltage switch control input. when ctl is high, the switch between gon and src is on and the switch between gon and drn is off. when ctl is low, the switch between gon and drn is on and the switch between gon and src is off. ctl is inhibited by vcc uvlo and when del is less than 1.25v. 9 rst reset output. rst is an open-drain output. 10 fbp positive charge-pump regulator feedback input. connect fbp to the center of a resistive voltage- divider between the positive charge-pump regulator output and agnd to set the positive charge-pump regulator output voltage. place the resistive voltage-divider within 5mm of fbp. 11 fbn negative charge-pump regulator feedback input. connect fbn to the center of a resistive voltage- divider between the negative output and ref to set the negative charge-pump regulator output voltage. place the resistive voltage-divider within 5mm of fbn. 12 ref reference output. connect a 0.22f capacitor from ref to agnd. all power outputs are disabled until ref exceeds its uvlo threshold. 13 vcc supplies the internal reference and other internal circuitry. connect vcc to the input supply voltage and bypass vcc to agnd with a minimum 1f ceramic capacitor. 14 agnd analog ground for step-up regulator and linear regulators. connect to power ground (pgnd) underneath the ic. 15 rstin reset input. connect to the center of a resistor-divider from v in . 16 comp compensation pin for error amplifier. connect a series rc from comp to agnd. 17 fb step-up regulator feedback input. connect fb to the center of a resistive voltage-divider between the step-up regulator output and agnd to set the regulators output voltage. place the resistive voltage- divider within 5mm of fb. 18, 19 pgnd power ground 20 lx step-up regulator switching node. connect inductor and catch diode here and minimize trace area for lowest emi power ground. 21 drn switch input. drain of the internal high-voltage back-to-back p-channel fet connects to com. 22 com internal high-voltage mosfet switch common terminal 23 src switch input. source of the internal high-voltage pfet. bypass src to pgnd with a minimum 0.1f capacitor close to the pin. 24 del high-voltage switch delay input. connect a capacitor from del to agnd to set delay. ep exposed pad. connect to agnd.
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp ______________________________________________________________________________________ 11 MAX17075 agnd vcc bgnd drvn ref fbn pos neg out lx pgnd rstin fb comp drn rst com src drvp fbp sup ctl del c11 0.1 f r14 1k r10 100k r6 13.7k r7 100k r3 100k r1 10 r12 20k r15 464k r11 r13 10k r8 187k r9 20k c12 220pf c10 1 f c9 0.22 f c5 1 f c13 0.01 f r16 20k v avdd to v com d4 v in 2.5v to 5.5v (4.5 to 5.5v for full load) v avdd 13v/500ma v gon 30v/20ma v goff -7v/20ma c15 0.1 f d2 c17 0.1 f d3 c1 10 f 6.3v c2 10 f 6.3v c14 1 f c6 1 f c16 1 f c3 10 f 25v c4 10 f 25v l1 3.0 h d1 from system 3.3v v in v avdd v avdd v avdd from tcon c8 0.033 f ep figure 1. typical operating circuit typical operating circuit the typical operating circuit (figure 1) of the MAX17075 is a complete power-supply system for tft lcd panels in monitors and tvs. the circuit generates a +13v source driver supply, a +30v positive gate-dri- ver supply, and a -7v negative gate-driver supply from a +2.5v to +5.5v input supply. table 1 lists some selected components, and table 2 lists the contact information for component suppliers.
detailed description the MAX17075 contains a step-up switching regulator to generate the source driver supply, and two charge- pump regulators to generate the gate-driver supplies. each regulator features adjustable output voltage, digi- tal soft-start, and timer-delayed fault protection. the step-up regulator uses fixed-frequency current-mode control architecture. the MAX17075 also includes one high-performance operational amplifier designed to drive the lcd backplane (vcom). the amplifier fea- tures high output current, fast slew rate (45v/?), wide bandwidth (20mhz), and rail-to-rail outputs. in addition, the MAX17075 features a high-voltage switch-control block, a 1.25v reference output, well-defined power-up and power-down sequences, and thermal-overload protection. figure 2 shows the MAX17075 functional block diagram. MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp 12 ______________________________________________________________________________________ MAX17075 pos lx pgnd fb out bgnd fbn drvn com ref v gon v vcc drn vcc agnd src sup neg switch control sequence boost controller negative charge pump positive charge pump ref osc rstin comp v vcc v goff del drvp fbp sup ctl rst from tcon v avdd v vcc v avdd pout v avdd figure 2. functional diagram
main step-up regulator the main step-up regulator employs a current-mode, fixed-frequency pwm architecture to maximize loop bandwidth and provide fast-transient response to pulsed loads that are typical for tft lcd panel source drivers. the 1.2mhz switching frequency allows the use of low-profile inductors and ceramic capacitors to mini- mize the thickness of lcd panel design. the integrated high-efficiency mosfet and the built-in digital soft-start function reduce the number of external components required while controlling inrush currents. the output voltage can be set from v in to 18v with an external resistive voltage-divider. the regulator controls the out- put voltage and the power delivered to the output by modulating the duty cycle (d) of the internal power mosfet in each switching cycle. the duty cycle of the mosfet is approximated by: where v avdd is the output voltage of the step-up regulator. figure 3 shows the functional diagram of the step-up regulator. an error amplifier compares the signal at fb to 1.25v and changes the comp output. the voltage at comp sets the peak inductor current. as the load varies, the error amplifier sources or sinks current to the comp output accordingly to produce the inductor peak current necessary to service the load. to maintain sta- bility at high duty cycles, a slope-compensation signal is summed with the current-sense signal. d vv v avdd in avdd ? MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp ______________________________________________________________________________________ 13 logic and driver soft- start i limit current-limit comparator pwm comparator error amp lx pgnd fb clock slope comp to fault logic fault comparator 1.0v 1.25v comp current sense oscillator MAX17075 figure 3. step-up regulator functional diagram designation description c1, c2 10f 20%, 6.3v x5r ceramic capacitors (0603) murata grm188r60j106m tdk c1608x5r0j106m c3, c4, c7 10f 20%, 25v x5r ceramic capacitors (1206) murata grm31cr61e106m tdk c3216x5r1e106m c10, c14 1f 10%, 50v x7r ceramic capacitors (1206) murata grm31mr71h105ka tdk c3216x7r1h105k designation description c11, c15, c16, c17 0.1f 10%, 50v x7r ceramic capacitors (0603) murata grm188r71h104k tdk c1608x7r1h104k d1 3a, 30v schottky diode (m-flat) toshiba cms02 (te12l,q) (top mark s2) d2, d3, d4 220ma, 100v dual diodes (sot23) fairchild mmbd4148se (top mark d4) l1 3.0h, 3a dc inductor sumida cdrh6d28-3r0 table 1. component list supplier phone fax website fairchild semiconductor 408-822-2000 408-822-2102 www.fairchildsemi.com sumida 847-545-6700 847-545-6720 www.sumida.com tdk 847-803-6100 847-390-4405 www.component.tdk.com toshiba 949-455-2000 949-859-3963 www.toshiba.com/taec table 2. component suppliers
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp 14 ______________________________________________________________________________________ on the rising edge of the internal clock, the controller sets a flip-flop, turning on the n-channel mosfet and applying the input voltage across the inductor. the cur- rent through the inductor ramps up linearly, storing energy in its magnetic field. once the sum of the cur- rent-feedback signal and the slope compensation exceed the comp voltage, the controller resets the flip-flop and turns off the mosfet. since the inductor current is continuous, a transverse potential develops across the inductor that turns on the diode (d1). the voltage across the inductor then becomes the differ- ence between the output voltage and the input voltage. this discharge condition forces the current through the inductor to ramp back down, transferring the energy stored in the magnetic field to the output capacitor and the load. the mosfet remains off for the rest of the clock cycle. positive charge-pump regulator the positive charge-pump regulator is typically used to generate the positive supply rail for the tft lcd gate- driver ics. the output voltage is set with an external resistive voltage-divider from its output to gnd with the midpoint connected to fbp. the number of charge- pump stages and the setting of the feedback divider determine the output voltage of the positive charge- pump regulator. the charge pump includes a high-side p-channel mosfet (p1) and a low-side n-channel mosfet (n1) to control the power transfer as shown in figure 4. the error amplifier compares the feedback signal (fbp) with a 1.25v internal reference. if the feedback signal is below the reference, the charge-pump regulator turns on p1 and turns off n1 when the rising edge of the oscillator clock arrives, level shifting c15 and c17 by v sup volts. if the voltage across c pout plus a diode drop (v pout + v diode ) is smaller than the level-shifted flying capacitor voltage (v c17 + v sup ), charge flows from c17 to c pout until diode d3-1 turns off. similarly, if the voltage across c16 plus a diode drop (v c16 + v diode ) is smaller than the level-shifted flying capacitor voltage (v c15 + v sup ), charge flows from c15 to c16 until diode d2-1 turns off. the falling edge of the oscil- lator clock turns off p1 and turns on n1, allowing v sup to charge up the flying capacitor c15 through d2-2 and c16 to charge c17 through diode d3-2. if the feedback signal is above the reference when the rising edge of the oscillator comes, the regulator ignores this clock edge and keeps n1 on and p1 off. the MAX17075 also monitors the fbp voltage for undervoltage conditions. if the v fbp is continuously below 80% of the nominal regulation voltage for approximately 50ms, the MAX17075 sets a fault latch, shutting down all outputs except ref. once the fault condition is removed, cycle the input voltage (below the uvlo falling threshold) to clear the fault latch and reac- tivate the device. osc ref 1.25v error amplifier positive charge-pump regulator MAX17075 p1 n1 sup input supply pout c14 c16 c15 c6 d2-2 d2-1 c17 d3-2 d3-1 drvp fbp figure 4. positive charge-pump regulator block diagram
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp ______________________________________________________________________________________ 15 negative charge-pump regulator the negative charge-pump regulator is typically used to generate the negative supply rail for the tft lcd gate driver ics. the output voltage is set with an external resistive voltage-divider from its output to ref with the midpoint connected to fbn. the number of charge- pump stages and the setting of the feedback divider determine the output of the negative charge-pump regu- lator. the charge-pump controller includes a high-side p- channel mosfet (p2) and a low-side n-channel mosfet (n2) to control the power transfer as shown in figure 5. the error amplifier compares the feedback signal (fbn) with a 250mv internal reference. if the feedback signal is above the reference, the charge-pump regulator turns on n2 and turns off p2 when the rising edge of the oscillator clock arrives, level shifting c11. this connects c11 in parallel with reservoir capacitor c10. if the volt- age across c10 minus a diode drop (v c10 - v diode ) is higher than the level-shifted flying capacitor voltage (-v c11 ), charge flows from c10 to c11 until diode d4-2 turns off. the falling edge of the oscillator clock turns off n2 and turns on p2, allowing v sup to charge up fly- ing capacitor c11 through diode d4-1. if the feedback signal is below the reference when the rising edge of the oscillator comes, the regulator ignores this clock edge and keeps p2 on and n2 off. the MAX17075 also monitors the fbn voltage for undervoltage conditions. if the v fbn is continuously below 80% of the nominal regulation voltage (v ref - v fbn ) for approximately 50ms, the MAX17075 sets a fault latch, shutting down all outputs except ref. once the fault condition is removed, cycle the input voltage (below the uvlo falling threshold) to clear the fault latch and reactivate the device. operational amplifiers the MAX17075 has one operational amplifier. the oper- ational amplifier is typically used to drive the lcd back- plane (vcom) or the gamma-correction divider string. it features ?00ma output short-circuit current, 45v/? slew rate, and 20mhz, 3db bandwidth. figure 5. negative charge-pump regulator block diagram osc ref 0.25v error amplifier negative charge-pump regulator MAX17075 p2 n2 sup input supply goff ref c10 c11 d4-1 d4-2 drvn fbn r7 r6
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp 16 ______________________________________________________________________________________ short-circuit current limit and input clamp the operational amplifier limits short-circuit current to approximately ?00ma if the output is directly shorted to sup or to bgnd. if the short-circuit condition per- sists, the junction temperature of the ic rises until it reaches the thermal-shutdown threshold (+160? typ). once the junction temperature reaches the thermal- shutdown threshold, an internal thermal sensor immedi- ately sets the thermal fault latch, shutting off all the ic? outputs. the device remains inactive until the input volt- age is cycled. the operational amplifier has 4v input clamp structures in series with a 500 resistance and a diode (figure 6). driving pure capacitive load the operational amplifier is typically used to drive the lcd backplane (vcom) or the gamma-correction divider string. the lcd backplane consists of a distrib- uted series capacitance and resistance, a load that can be easily driven by the operational amplifier. however, if the operational amplifier is used in an application with a pure capacitive load, steps must be taken to ensure stable operation. as the operational amplifier? capaci- tive load increases, the amplifier? bandwidth decreas- es and gain peaking increases. a 5 to 50 small resistor placed between out and the capacitive load reduces peaking, but also reduces the gain. an alterna- tive method of reducing peaking is to place a series rc network (snubber) in parallel with the capacitive load. the rc network does not continuously load the output or reduce the gain. typical values of the resistor are between 100 and 200 , and the typical value of the capacitor is 10nf. high-voltage switch control the MAX17075? high-voltage switch control block (figure 7) consists of two high-voltage p-channel mosfets: q1, between src and com; and q2, between com and drn. at power-up and only at power up, before the switch control is enabled (a 1.5k pulldown is present on com). at switch-off, com is high impedance. the switch control input (ctl) is not activated until all four of the following conditions are satisfied: the input voltage exceeds uvlo, the soft-start routine of all the regulators is complete, there is no fault condition detected, and v del exceeds its turn-on threshold. once activated and if ctl is logic-high, q1 turns on and q2 turns off, connecting com to src. when ctl is logic-low, q1 turns off and q2 turns on, connecting com to drn. figure 6. op amp input clamp structure neg pos 4v 500 op amp input clamp structure sup out bgnd MAX17075 figure 7. switch control q3 5 a q1 q2 2.25v v ref switch control vcc del ctl drn src com fault ref_ok MAX17075 1.5k q4
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp ______________________________________________________________________________________ 17 reference voltage (ref) the reference voltage is nominally 1.25v, and can source at least 50? (see the typical operating characteristics ). v cc is the input of the internal refer- ence block. bypass ref with a 0.22? ceramic capaci- tor connected between ref and agnd. power-up sequence and soft-start once the voltage on v cc exceeds the xao uvlo threshold of approximately 1.5v, the reference turns on. with a 0.22? ref bypass capacitor, the reference reaches its regulation voltage of 1.25v in approximately 1ms. when the reference voltage exceeds 1v and v cc exceeds its uvlo threshold of approximately 2.25v, the ic enables the main step-up regulator, the gate-on linear-regulator controller, and the gate-off linear- regulator controller simultaneously. the ic employs soft-start for each regulator to minimize inrush current and voltage overshoot and to ensure a well-defined startup behavior. each output uses a 7-bit soft-start dac. for the step-up and the gate-on linear regulator, the dac output is stepped in 128 steps from zero up to the reference voltage. for the gate-off linear regulator, the dac output steps from the reference down to 250mv in 128 steps. the soft-start duration is 10ms (typ) for step-up regulator and 3ms (typ) for gate- on and gate-off regulators. a capacitor (c del ) from del to agnd determines the switch-control-block startup delay. after the input volt- age exceeds the uvlo threshold (2.25v typ) and the soft-start routine for each regulator is complete and there is no fault detected, a 5ma current source starts charging c del . once the capacitor voltage exceeds 1.25v (typ), the switch-control block is enabled as shown in figure 8. after the switch-control block is enabled, com can be connected to src or drn through the internal p-channel switches, depending upon the state of ctl. before startup and when v in is less than uvlo, del is internally connected to agnd to discharge c del . select c del to set the delay time using the following equation: undervoltage lockout (uvlo) the uvlo circuit compares the input voltage at v cc with the uvlo threshold (2.25v rising, 2.20v falling, typ) to ensure the input voltage is high enough for reliable operation. the 50mv (typ) hysteresis prevents supply transients from causing a restart. once the input voltage exceeds the uvlo rising threshold, startup begins. when the input voltage falls below the uvlo falling threshold, the controller turns off the main step-up regu- lator and disables the switch-control block; the opera- tional amplifier output is high impedance. fault protection during steady-state operation, if the output of the main regulator or any of the linear-regulator outputs exceed their respective fault-detection thresholds, the MAX17075 activates an internal fault timer. if any condi- tion or combination of conditions indicates a continuous fault for the fault-timer duration (50ms typ), the MAX17075 sets the fault latch to shut down all the out- puts except the reference. once the fault condition is removed, cycle the input voltage (below the uvlo falling threshold) to clear the fault latch and reactivate the device. the fault-detection circuit is disabled during the soft-start time. cdelaytime ? v del = _ . 5 125 figure 8. power-up sequence 1.5v 1v 1.25v input voltage ok switch control enabled 14ms 3ms soft-start soft-start soft-start begins 2.25v v vcc v ref v avdd v com v pout v goff v del v gon
MAX17075 thermal-overload protection thermal-overload protection prevents excessive power dissipation from overheating the MAX17075. when the junction temperature exceeds +160?, a thermal sen- sor immediately activates the fault protection, which shuts down all outputs except the reference, allowing the device to cool down. once the device cools down by approximately 15?, cycle the input voltage (below the uvlo falling threshold) to clear the fault latch and reactivate the device. the thermal-overload protection protects the controller in the event of fault conditions. for continuous opera- tion, do not exceed the absolute maximum junction temperature rating of +150?. xao voltage detector based upon the input at the rstin and vcc pins, the xao controller either pulls the reset pin rst low or sets it to high impedance. rst is an open-drain output. pull it high to system 3.3v through a 10k resistor. connect rstin to v in through resistor-dividers r11 and r12 (figure 1) to set the proper xao threshold. once v cc voltage exceeds approximately 2.25v, the controller initiates a 220ms blanking period during which the drop on v cc is ignored and rst is set to high impedance. after this blanking period and if rstin goes below approximately 1.25v, rst is pulled low indicating low rstin input. rst stays low until v cc falls below approximately 1v. then rst cannot be held low any more. the controller gives up and rst is pulled up by the external resister. a 50mv hysteresis is imple- mented for xao threshold. design procedure step-up regulator inductor selection the minimum inductance value, peak current rating, and series resistance are factors to consider when selecting the inductor. these factors influence the con- verter? efficiency, maximum output load capability, transient-response time, and output voltage ripple. size and cost are also important factors to consider. the maximum output current, input voltage, output volt- age, and switching frequency determine the inductor value. very high inductance values minimize the current ripple, and therefore reduce the peak current, which decreases core losses in the inductor and conduction losses in the entire power path. however, large inductor values also require more energy storage and more turns of wire, which increase size and can increase conduc- tion losses in the inductor. low inductance values decrease the size, but increase the current ripple and peak current. finding the best inductor involves choos- ing the best compromise between circuit efficiency, inductor size, and cost. the equations used here include a constant lir, which is the ratio of the inductor peak-to-peak ripple current to the average dc inductor current at the full load current. the best trade-off between inductor size and circuit efficiency for step-up regulators generally has an lir between 0.3 and 0.6. however, depending on the ac characteristics of the inductor core material and ratio of inductor resistance to other power-path resistances, the best lir can shift up or down. if the inductor resistance is relatively high, more ripple can be accepted to reduce the number of turns required and increase the wire diameter. if the inductor resistance is relatively low, increasing inductance to lower the peak current can decrease losses throughout the power path. if extreme- ly thin high-resistance inductors are used, as is com- mon for lcd-panel applications, the best lir can increase to between 0.5 and 1.0. once a physical inductor is chosen, higher and lower values of the inductor should be evaluated for efficiency improvements in typical operating regions. calculate the approximate inductor value using the typ- ical input voltage (v in ), the maximum output current (i main(max )), and the expected efficiency ( typ) taken from an appropriate curve in the typical operating characteristics section, and an estimate of lir based on the above discussion: choose an available inductor value from an appropriate inductor family. calculate the maximum dc input cur- rent at the minimum input voltage (v in(min) ) using con- servation of energy and the expected efficiency at that operating point ( min ) taken from the appropriate curve in the typical operating characteristics : calculate the ripple current at that operating point and the peak current required for the inductor: ii i avdd peak in dc max avdd ripple _(,) _ =+ 2 i vvv l avdd ripple in min avdd in min avdd _ () () = ? () vf avdd sw i iv v in dc max avdd max avdd in min min (, ) () () = l v v vv if avdd in avdd avdd in avdd max s = ? ? ? ? ? ? ? 2 () ww typ lir ? ? ? ? ? ? ? ? ? ? ? ? boost regulator with integrated charge pumps, switch control, and high-current op amp 18 ______________________________________________________________________________________
the inductor? saturation current rating and the MAX17075? lx current limit should exceed i avdd _ peak , and the inductor? dc current rating should exceed i in(dc,max) . for good efficiency, choose an inductor with less than 0.1 series resistance. considering the typical operating circuit, the maximum load current (i avdd(max) ) is 500ma with a 13v output and a typical input voltage of 5v. choosing an lir of 0.5 and estimating efficiency of 85% at this operating point: using the circuit? minimum input voltage (2.5v) and estimating efficiency of 80% at that operating point: the ripple current and the peak current are: output capacitor selection the total output voltage ripple has two components: the capacitive ripple caused by the charging and discharg- ing of the output capacitance, and the ohmic ripple due to the capacitor? equivalent series resistance (esr): and where i peak is the peak inductor current (see the inductor selection section). for ceramic capacitors, the output voltage ripple is typically dominated by v avdd _ ripple(c) . the voltage rating and temperature characteristics of the output capacitor must also be considered. input-capacitor selection the input capacitor (c in ) reduces the current peaks drawn from the input supply and reduces noise injec- tion into the ic. two 10? ceramic capacitors are used in the typical operating circuit (figure 1) because of the high source impedance seen in typical lab setups. actual applications usually have much lower source impedance since the step-up regulator often runs directly from the output of another regulated supply. typically, c in can be reduced below the values used in the typical operating circuit. ensure a low-noise supply at v cc by using adequate c in . alternately, greater volt- age variation can be tolerated on c in if vcc is decou- pled from c in using an rc lowpass filter (see r1 and c5 in figure 1). rectifier diode the MAX17075? high switching frequency demands a high-speed rectifier. schottky diodes are recommend- ed for most applications because of their fast recovery time and low forward voltage. in general, a 2a schottky diode complements the internal mosfet well. output voltage selection the output voltage of the step-up regulator can be adjusted by connecting a resistive voltage-divider from the output (v avdd ) to ground with the center tap con- nected to fb (see figure 1). select r9 in the 10k to 50k range. calculate r8 with the following equation: where v fb , the step-up regulator? feedback set point, is 1.25v. place r8 and r9 close to the ic. loop compensation choose r comp (r10 in figure 1) to set the high-fre- quency integrator gain for fast-transient response. choose c comp (c12 in figure 1) to set the integrator zero to maintain loop stability. for low-esr output capacitors, use the following equa- tions to obtain stable performance and good transient response: c vc ir comp avdd avdd avdd max comp 10 () r vv c li comp in avdd avdd avdd avdd max 312 5 . () rr v v avdd fb 89 1 = ? ? ? ? ? ? ? vir avdd ripple esr peak esr avdd _() _ v i c vv vf avdd ripple c avdd avdd avdd in avdd sw _() ? ?? ? ? ? ? ? , vv v avdd ripple avdd ripple c avdd ripple e __()_( =+ s sr) ia a a peak =+ 325 051 2 351 . . . i vvv ? v mhz ripple = ? () 25 13 25 33 13 12 05 .. .. .1 1a i av v a in dc max (, ) . .. . = 05 13 25 08 325 l v v vv amhz avdd = ? ? ? ? ? ? ? ? ? ? ? ? ? 5 13 13 5 05 12 0 2 .. . 8 85 05 335 . . ? ? ? ? ? ? ? h MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp ______________________________________________________________________________________ 19
MAX17075 to further optimize transient response, vary r comp in 20% steps and c comp in 50% steps while observing transient-response waveforms. charge-pump regulators selecting the number of charge-pump stages for highest efficiency, always choose the lowest num- ber of charge-pump stages that meet the output requirement. the number of positive charge-pump stages is given by: where n pos is the number of positive charge-pump stages, v gon is the output of the positive charge-pump regulator, v sup is the supply voltage of the charge- pump regulators, v d is the forward voltage drop of the charge-pump diode, and v dropout is the dropout margin for the regulator. use v dropout = 600mv. the number of negative charge-pump stages is given by: where n neg is the number of negative charge-pump stages and v goff is the output of the negative charge- pump regulator. the above equations are derived based on the assumption that the first stage of the positive charge pump is connected to v avdd and the first stage of the negative charge pump is connected to ground. flying capacitors increasing the flying capacitor c x (connected to drvn and drvp) value lowers the effective source impedance and increases the output current capability. increasing the capacitance indefinitely has a negligible effect on output current capability because the internal switch resistance and the diode impedance place a lower limit on the source impedance. a 0.1? ceramic capacitor works well in most low-current applications. the flying capacitor? voltage rating must exceed the following: where n is the stage number in which the flying capaci- tor appears. charge-pump output capacitor increasing the output capacitance or decreasing the esr reduces the output ripple voltage and the peak-to- peak transient voltage. with ceramic capacitors, the output voltage ripple is dominated by the capacitance value. use the following equation to approximate the required capacitor value: where c out _ cp is the output capacitor of the charge pump, i load _ cp is the load current of the charge pump, and v ripple_cp is the peak-to-peak value of the output ripple, and f osc is the switching frequency. output voltage selection adjust the positive charge-pump regulator? output volt- age by connecting a resistive voltage-divider from the reg p output to gnd with the center tap connected to fbp (figure 1). select the lower resistor of divider r16 in the 10k to 30k range. calculate the upper resistor r15 with the following equation: where v fbp = 1.25v (typical). adjust the negative charge-pump regulator? output voltage by connecting a resistive voltage-divider from v goff to ref with the center tap connected to fbn (figure 1). select r6 in the 35k to 68k range. calculate r7 with the following equation: where v fbn = 250mv, v ref = 1.25v. note that ref can only source up to 50a, using a resistor less than 35k for r6 results in higher bias current than ref can supply. set the xao threshold voltage xao threshold voltage can be adjusted by connecting a resistive voltage-divider from input v in to gnd with the center tap connected to rstin (see figure 1). select r12 in the 10k to 50k range. calculate r11 with the following equation: where v rstin , the rstin threshold set point, is 1.25v. v inxao is the desired xao threshold voltage. place r11 and r12 close to the ic. rr v v inxao rstin 11 12 1 = ? ? ? ? ? ? ? rr vv vv fbn goff ref fbn 76 = ? ? rr v v gon fbp 15 16 1 = ? ? ? ? ? ? ? c i fv out cp load cp osc ripple cp _ _ _ 2 vnv cx sup > neg goff dropout sup d vv vv = ?+ ? 2 pos gon dropout avdd sup d vv v vv = +? ? 2 boost regulator with integrated charge pumps, switch control, and high-current op amp 20 ______________________________________________________________________________________
pcb layout and grounding careful pcb layout is important for proper operation. use the following guidelines for good pcb layout: minimize the area of high-current loops by placing the inductor, the output diode, and the output capacitors near the input capacitors and near the lx and pgnd pins. the high-current input loop goes from the positive terminal of the input capaci- tor to the inductor, to the ic? lx pin, out of pgnd, and to the input capacitor? negative terminal. the high-current output loop is from the positive terminal of the input capacitor to the inductor, to the output diode (d1), and to the positive terminal of the output capacitors, reconnecting between the output capacitor and input capacitor ground terminals. connect these loop components with short, wide connections. avoid using vias in the high-current paths. if vias are unavoidable, use many vias in parallel to reduce resistance and inductance. create a power-ground island (pgnd) consisting of the input and output capacitor grounds, pgnd pin, and any charge-pump components. connect all these together with short, wide traces or a small ground plane. maximizing the width of the power ground traces improves efficiency and reduces out- put voltage ripple and noise spikes. create an ana- log ground plane (agnd) consisting of the agnd pin, all the feedback-divider ground connections, the operational amplifier divider ground connec- tions, the comp and del capacitor ground con- nections, and the device? exposed backside paddle. connect the agnd and pgnd islands by connecting the pgnd pin directly to the exposed backside paddle. make no other connections between these separate ground planes. place all feedback voltage-divider resistors within 5mm of their respective feedback pins. the divider? center trace should be kept short. placing the resistors far away causes their fb traces to become antennas that can pick up switching noise. take care to avoid running any feedback trace near lx or the switching nodes in the charge pumps, or provide a ground shield. place the vcc pin and ref pin bypass capacitors as close as possible to the device. the ground con- nection of the vcc bypass capacitor should be connected directly to the agnd pin with a wide trace. minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. minimize the size of the lx node while keeping it wide and short. keep the lx node away from feed- back nodes (fb, fbp, and fbn) and analog ground. use dc traces to shield if necessary. refer to the MAX17075 evaluation kit for an example of proper pcb layout. MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp ______________________________________________________________________________________ 21
MAX17075 boost regulator with integrated charge pumps, switch control, and high-current op amp maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 22 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2008 maxim integrated products is a registered trademark of maxim integrated products, inc. maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 22 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2008 maxim integrated products is a registered trademark of maxim integrated products, inc. 23 24 22 21 8 7 9 neg bgnd sup drvp 10 pos fb rst in agnd pgnd vcc 12 com 456 17 18 16 14 13 src del fbp rst ctl drvn MAX17075 out comp 3 15 drn 20 11 fbn lx 19 12 ref pgnd thin qfn top view pin configuration chip information process: s45ur package information for the latest package outline information, go to www.maxim-ic.com/packages . package type package code document no. 24 tqfn t 2444-4 21-0139

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